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GATE 2020 - Computer Organization and Architecture

This Test will cover complete Computer Organization and Architecture with very important questions, starting off from basics to advanced level.
Q. Which of the following is responsible for coordinating various operations using timing signals?
Q. The device which is used to connect a peripheral to a bus is called?
Q. Number of machine cycles required for RET instruction in 8085 microprocessor is?
Q. The number of instructions needed to add n numbers and store the result in memory using only one address instructions is?

Q. Which of the following Interrupts are unmaskable Interrupts?
Q. The technique which repeatedly uses the same block of internal storage during different stage of problem is called?
Q. What is the storage of a Hollerith card which is organised into nibbles?
Q. In 8085 microprocessor, the value of the most significant bit of the result, following the execution of any arithmetic or Boolean instruction is stored in the?
Q. Choose the correct statement from the following?

Q. The minimum Time delay required between initiation of two successive memory operations is called?
Q. How many 32 x 1 RAM chips are needed to provide a memory capacity of 256 k-bytes?
Q. Let the page fault service time be 10 ms in a computer with average memory access time being 20 ns. If one page fault is generated for every 10^6 memory accesses, what is the effective access time for the memory?
Q. Register renaming is done in pipelined processors. Which of the below statement is correct?
Q. The refreshing rate of dynamic RAMs is approximately once in?
Q. Which of the following need extra hardware for DRAM refreshing?

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